1. Technical Field
The present invention relates to processing of loop instructions in a data processing device, specifically processing loop instructions using a loop buffer in a data processing device having a CPU and a coprocessor.
2. Discussion of Related Art
In a conventional data processing device having a CPU and a coprocessor, the CPU fetches instructions stored in main program memory for execution by the CPU and/or the coprocessor. Coprocessor instructions are decoded by the CPU and if the decode indicates a coprocessor operation, the CPU signals to the coprocessor to decode the coprocessor instruction for execution. Coprocessors are often used for digital signal processing (DSP) wherein arithmetic calculations (e.g., multiplying, accumulating, dividing, etc.) are frequently encountered. Although dedicated circuits such as multipliers, dividers, or accumulators can be used to perform arithmetic calculations, software arithmetic routines are preferred for various reasons including less space requirements and costs. CPUs can process the arithmetic software routines, but coprocessors are often employed to more efficiently handle the arithmetic routines. Typically, arithmetic routines include many repeated data shifting and thus looping operations. Instructions within a loop routine are fetched by the CPU from the program memory for execution and the same instructions are fetched and executed in subsequent iterations, e.g., a block of instructions for performing a division is looped or reiterated several times for successive division operations. When a data processing device having a CPU and a coprocessor encounters numerous loop operations, the performance of the data processing device is degraded in terms of speed because of increased overhead on the CPU to process the branch, interrupt, or exception instructions. For example, the CPU or the coprocessor must keep track of where the processing routine is before a branch so that the routine can continue upon return from the branch. A separate stack pointer is commonly used by the CPU to handle the execution routines. Further, more power is consumed because of the frequent access of instructions from the main program memory.
A need therefore exists for a data processing device having a CPU and a coprocessor for effectively handling loop operations while reducing CPU overhead and power consumption of the processing device.